Intel Montecito

Introduced: 2006-07-18

Description: Dual core IA-64 processor with Switch on Event MultiThreading (SoEMT), (like Niagara) built on a 90 nm process. Expected to improve on Madison 9M's performance by 2.5 times. To include 2 * 1MB of L2 cache, 2 * 12MB of L3 cache and around 1.7 billion transistors.
Consumes "only" 100W. (Foxton was to clock it up to 2.0 GHz when it was running cool enough, but was canceled.)
The 2.0 GHz / 24 MB versions are delayed until Q2 2006.
Will be named 9000 (9015, 9020, 9030, 9040 and 9050). The 9010 is a single core version.

Type: Processors [Roadmap] [Timeline]

State: Released

Quick Specs

Die size~580 mm2
Bus speed533 / 667 MHz
L2 cache2 * 1MB
Core speed1.6 GHz
Transistors1.72 B
Power100 W
Price$696 - $3692
L3 cache6 - 2 * 12 MB
TypeServer, 2 x EPIC,
CoreMontecito

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News clips relating to Intel Montecito

Showing 76-99 from 99 results. Page: [1 2 3 4 ]

2003-11-14 Intel Revamps Montecito to Integrate 24MB of Cache: The Monster to Become Bigger Xbit Labs [rm]

2003-11-14 Intel reveals more Itanium Montecito details The Inquirer [rm]

2003-11-10 Intel Itanium 2 "Fanwood" to Have Faster Processor's Bus Xbit Labs [rm]

2003-09-24 AMD Confirms Multiple Cores on a Single Chip Plans Xbit Labs [rm]

2003-09-16 Intel's Otellini drops four processor bombshell, 24 hours from Tulsa: Vanderpool The Inquirer [rm]

2003-09-16 Intel commits to multi-core Itanics, Xeons The Register [rm]

2003-06-04 Sun chip engineers talk multicore, SPARC delays The Register [rm]

2003-04-25 Tanglewood to run 10x faster than Madison The Register [rm]

2003-02-11 Dual-core Itanium Montecito to have 18MB cache: More than a billion transistors in 2005 The Inquirer [rm]

2003-02-10 2003 ISSCC #!@* ISSCC *#%&~ Madison/Montecito: Pictures of Madison core. Sorry about my Japanese.... PCWatch [rm]

2003-02-10 Pictures of Intel Madison hit the web: 9MB cache next year, and dual core Montecito The Inquirer [rm]

2003-02-10 Intel discloses 'arbiter' bus with revised 64-bit processor line EET [rm]

2003-02-10 ISSCC: Neues zur Itanium-Familie heise online [rm]

2003-01-16 Intel confirms dual core Itanium ahead The Inquirer [rm]

2003-01-16 Intel accelerates Itanium schedule C/Net [rm]

2002-11-01 Intel IA-64 (0.18 Microns - Mics, current 2002 die spacing level) Other [rm]

2002-10-28 HP plans dual Montecito Intel Itaniums for H1 2003 The Register [rm]

2002-10-16 Four-core Itanium 2 mooted at Microprocessor Forum The Inquirer [rm]

2002-10-15 Intel describes billion-transistor four-core Itanium processor: Four IA-64 cores, one 12-16 MB cache, 1 billion transistors. Could be developed in a 65 nm process in 2007 EET [rm]

2002-10-11 Itanium III -- cough, Madison -- taped out The Inquirer [rm]

2002-09-01 Intel - Mentocito - 64-bit IA-64 GEEK.com [rm]

2002-02-26 Intel to drop support of Rambus in new CPU products EBN [rm]

2002-01-22 Itanium to take on Alpha influence C/Net [rm]

2001-10-07 Intel to hit 20GHz in 2006: Chivano? The Inquirer [rm]

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