Intel Clovertown

Introduced: 2007-H1

Description: Server-version of Allendale. 4-core chip with 4MB of cache. (Previously referred to as Cloverton.) Claimed to be 2 Woodcrest cores in one package. Part of the Stoakley platform. Uses the Seaburg chipset.

Type: Processors [Roadmap] [Timeline]

State: Planned

Quick Specs

Die size1066 - 1333 MHz
L2 cache4 MB

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News clips relating to Intel Clovertown

Showing 1-15 from 15 results. Page: [1 ]

2006-09-21 Quad-core Xeon Details Unveiled DailyTech [rm]

2006-08-01 Intel quad-cores likely to use 1333FSB The Inquirer [rm]

2006-07-10 32-Core Processors: Intel Reaches For (The) Sun: What is the processor future like? Project Keifer could trigger a major core count increase, four threads per core, integrated memory controllers (yes!) and a ring-type interconnect for co... Tom's Hardware [rm]

2006-05-27 AMD has two counters to Conroe The Inquirer [rm]

2006-04-20 Intel Woodcrest is an 80W part The Inquirer [rm]

2006-04-17 Microsoft unveils Intel server roadmap The Inquirer [rm]

2006-04-13 Clovertown, Cinema and Woodcrest rock The Inquirer [rm]

2006-02-28 Intel multicore approach needs psychoanalysis, claim The Inquirer [rm]

2006-02-16 Intel tells its employees all about the Clovertown CPU The Inquirer [rm]

2006-02-16 Intel attempts dragging quad core Clovertown into 2006 The Inquirer [rm]

2006-02-10 Intel promises quad server chips for Q1 2007 The Inquirer [rm]

2005-12-31 AMD-Intel server market faces Woodcrest vs F-Step scrap The Inquirer [rm]

2005-12-04 Top Secret Intel Processor Plans Uncovered: Intel plans to unleash the first quad core CPU (Kentsfield) within one year. The switch to 45 nm in 2007 will enable eight cores and up to 12 MB L2 cache (Yorkfield) per CPU. We x-rayed the com... Tom's Hardware [rm]

2005-10-25 Intel server strategy crashes as Xeon roadmap changes The Inquirer [rm]

2005-08-23 Intel Merom is designed from the ground up: Intel Developer Forum: Merom wasn't built in a day The Inquirer [rm]

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