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Intel Fanwood / Madison 9M

Introduced: 2004-11-08

Description: Upgraded Madison with 9 MB of L3 cache. Said to run at 1.6 GHz, and DP chips will include a bus speed increase to 533 MHz (earlier thought to be 667 or 800 MHz), while MP chips stay at 400 for now. The DP chip is called Fanwood while the MP chip is known as Madison 9M. Uses the E8870 chipset.
An upgraded Deerfield (a low voltage Itanium) will also be launched known as Fanwood LV. The first versions use the 400 MHz bus, while chips using a 667 MHz bus will show up in 2005-Q1.

Type: Processors [Roadmap] [Timeline]

State: Released

Quick Specs

Bus speed400 MHz (533 MHz in 06-Q1)
Process130 nm
Core speed1.6 GHz
Price$4226
L3 cache9 MB
TypeServer, EPIC, DP
CoreMadison 9M

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News clips relating to Intel Fanwood / Madison 9M

Showing 26-50 from 51 results. Page: [13 ]

2004-03-07 Intel discloses a Fister full of Montecito The Inquirer [rm]

2004-03-05 PC Watch Impress: Fister, Barrett & roadmaps PCWatch [rm]

2004-03-05 HP: Who will refund the tickets for the Itanic Line Cruise? The Inquirer [rm]

2004-03-03 64-bit extensions downplayed in Intel server plans: Roadmap update The Inquirer [rm]

2004-02-18 The point of Itanium keeps floating with new chips The Register [rm]

2004-02-18 Intel Exec Runs Down New Itanium Roadmap: Intel VP Mike Fister on Wednesday presented a broad overview of the company's enterprise processor roadmap to the Intel Developer Forum audience. He also offered more details of the 64-bit Xeon e... ExtremeTech [rm]

2004-01-29 Xeon 4MB comes end of February, 775 Xeons on way The Inquirer [rm]

2004-01-14 Intel Itanium dual core roadmaps up on web Other [rm]

2003-12-11 Intel Itanium Fanwood to offer faster system bus The Inquirer [rm]

2003-11-14 Intel Revamps Montecito to Integrate 24MB of Cache: The Monster to Become Bigger Xbit Labs [rm]

2003-11-10 Intel Itanium 2 "Fanwood" to Have Faster Processor's Bus Xbit Labs [rm]

2003-10-09 4MB Xeons to launch Q1 04, Potomac and Twin Castle delayed The Inquirer [rm]

2003-08-28 Intel Jayhawk and Potomac to arrive next year: Copper River Q3 2002 The Inquirer [rm]

2003-06-03 Nocona, Jayhawk to use 800MHz system bus The Inquirer [rm]

2003-05-13 64-bit battle lines form The Inquirer [rm]

2003-05-08 Intel's server chip directions undergo sea-change The Inquirer [rm]

2003-04-24 The future of 64-bit processing II: HP torn between platforms? The Inquirer [rm]

2003-04-15 Intel set to ratchet up server chip speeds The Inquirer [rm]

2003-04-14 Intel ready to Jayhawk (sic) with dual pro systems The Inquirer [rm]

2003-04-14 Intel to release low voltage Itanium 2 blades The Inquirer [rm]

2003-02-11 Dual-core Itanium Montecito to have 18MB cache: More than a billion transistors in 2005 The Inquirer [rm]

2003-02-10 ISSCC: Neues zur Itanium-Familie heise online [rm]

2003-02-10 Intel discloses 'arbiter' bus with revised 64-bit processor line EET [rm]

2003-02-10 2003 ISSCC #!@* ISSCC *#%&~ Madison/Montecito: Pictures of Madison core. Sorry about my Japanese.... PCWatch [rm]

2003-02-10 Pictures of Intel Madison hit the web: 9MB cache next year, and dual core Montecito The Inquirer [rm]

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