2006-02-16 Intel attempts dragging quad core Clovertown into 2006

Link to story (The Inquirer)

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Related Roadmap Items

2007-H1 Intel Clovertown Server-version of Allendale. 4-core chip with 4MB of cache. (Previously referred to as Cloverton.) Claimed to be 2 Woodcrest cores in one package. Part of the Stoakley platform. Uses the Seaburg chipset.