2006-04-01 Intel Server Processor Roadmap Update:  Dual-core, quad-core and processors with 24MB of cache; Intel is determined to take the top spot for servers

Link to story (DailyTech)

Other news this month

Related Roadmap Items

2004-11-08 Intel Fanwood / Madison 9M Upgraded Madison with 9 MB of L3 cache. Said to run at 1.6 GHz, and DP chips will include a bus speed increase to 533 MHz (earlier thought to be 667 or 800 MHz), while MP chips stay at 400 for now. The DP chip is called Fanwood while the MP chip is known as Madison 9M. Uses the E8870 chipset.
An upgraded Deerfield (a low voltage Itanium) will also be launched known as Fanwood LV. The first versions use the 400 MHz bus, while chips using a 667 MHz bus will show up in 2005-Q1.

2005-10-10 Intel Paxville Dual core server processor. Paxville is the server version of Smithfield. Uses the Twin Castle / Enabled chipsets. Will be known as the Xeon 7000 series MP.

2006-Q2 Intel Dempsey Dual core server processor to succeed Irwindale. An MV Dempsey with a power demand of less than 105 W will also be out. Part of the Bensley platform. Some samples will be out this year. Uses the Greencreek and Blackford chipsets

2006-07-18 Intel Montecito Dual core IA-64 processor with Switch on Event MultiThreading (SoEMT), (like Niagara) built on a 90 nm process. Expected to improve on Madison 9M's performance by 2.5 times. To include 2 * 1MB of L2 cache, 2 * 12MB of L3 cache and around 1.7 billion transistors.
Consumes "only" 100W. (Foxton was to clock it up to 2.0 GHz when it was running cool enough, but was canceled.)
The 2.0 GHz / 24 MB versions are delayed until Q2 2006.
Will be named 9000 (9015, 9020, 9030, 9040 and 9050). The 9010 is a single core version.

2006-07-27 Intel Merom Mobile processor succeeding Prescott-M and Yonah built on a 65 nm process. Accompanied by the Crestine chipset. Recent rumours claim that Merom is a major new core design with multiple cores and, depending on version, 2-4 MB of cache, which will also form the base for the next desktop chip, Conroe. Said to consume about 45W.
Earlier said to launch in 05-H2 or 2007, prototype chips has been out since May of 2006.
Merom is part of the Santa Rosa Centrino platform, succeeding Napa. Said to be used in future Macs.
Bus speed to go up to 800 MHz in 2007-H1.
Will be named T7600, the T7400, the T7200 and T5600.

2006-Q3 Intel Tulsa Dual-core IA-32 server chip in the Xeon class, succeeding Potomac to launch in 2006. Based on two Netburst cores with Hyperthreading.

2007-Q1 Intel Kentsfield 4-core processor built using two Conroe dies. Succeeds Smithfield.

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