2002-10-28 HP plans dual Montecito Intel Itaniums for H1 2003

Link to story (The Register)

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2004-02-10 Sun UltraSparc IV 4-way superscalar processor built with a 130 nm process running at 1.2 to 2 GHz. Consists of 2 UltraSPARC III pipelines. Pin compatible with UltraSPARC III. Previously code named Jaguar and planned for 03-H2. Later made in a 90 nm version.

2006-07-18 Intel Montecito Dual core IA-64 processor with Switch on Event MultiThreading (SoEMT), (like Niagara) built on a 90 nm process. Expected to improve on Madison 9M's performance by 2.5 times. To include 2 * 1MB of L2 cache, 2 * 12MB of L3 cache and around 1.7 billion transistors.
Consumes "only" 100W. (Foxton was to clock it up to 2.0 GHz when it was running cool enough, but was canceled.)
The 2.0 GHz / 24 MB versions are delayed until Q2 2006.
Will be named 9000 (9015, 9020, 9030, 9040 and 9050). The 9010 is a single core version.

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