2008 Intel Tanglewood / Tukwila IA-64 processor originally said to have eight (plus one spare) cores per die and 16-32MB of cache to follow after Montecito. Appears to use parts from a follow-on project to the now canceled Alpha EV8. Said to arrive in 2006 or 2007 and offer "at least seven times the processing" power of Madison. Other rumours claim that HP wants their advanced math libraries on the die in silicon and that it might include a vector engine.
The 8+1 core version (designed in Hudson) is now said to be replaced by a 2-core version designed in Fort Collins.
Recently said to be renamed from Tanglewood to Tukwila due to copyright reasons.
Should use the new CSI bus and socket like Whitefield). Latest info indicates it will include 4 cores with 6x4 MB of L2 cache and an on-bord FB-DIMM memory controller..
2008 Intel Nehalem Nehalem was a new design built using a 65 nm process with half the die size of a Northwood. Was supposed to use a 1200 MHz (or a 4 GHz bus as some rumours claim) bus and start at 9.60 GHz before continuing to 10 GHz+.
Nehalem is now changed to be the name of the family succeeding Merom, Conroe and Woodcrest, which is 45nm and will include Whitefield, Gainstown and Bloomfield. The Nehalem platform will use the Tylersburg chipset