2004-06-28 Intel E7520 / E7320 Xeon chipset supporting the 800 MHz front side bus made to support Nocona. Supports PCI Express, Serial ATA and DDR-II. The E7520 was previously known as E7710 and Lindenhurst while the slightly cheaper E7320 has been known as E7510 and Lindenhurst-VS.
2004-06-28 Intel Nocona Xeon DP variety of Prescott made with the 90 nm process. Uses the Tumwater and Lindenhurst chipsets with a 800 MHz bus. Includes HyperThreading, SSE3 and the 64-bit EM64T (earlier CT, Yamhill, AMD64) Technology.
2004-11-08 Intel Fanwood / Madison 9M Upgraded Madison with 9 MB of L3 cache. Said to run at 1.6 GHz, and DP chips will include a bus speed increase to 533 MHz (earlier thought to be 667 or 800 MHz), while MP chips stay at 400 for now. The DP chip is called Fanwood while the MP chip is known as Madison 9M. Uses the E8870 chipset.
An upgraded Deerfield (a low voltage Itanium) will also be launched known as Fanwood LV. The first versions use the 400 MHz bus, while chips using a 667 MHz bus will show up in 2005-Q1.
2004-Q4 Intel E7221 Single processor chipset for workstations based on Prescott and possibly the processor succeeding Prescott. The chipset was formerly known as Copper River and succeeds Canterwood-ES
2005-03-29 Intel Potomac Prescott based chip for 4- and 8-processor servers. Will have the EM64T bit extensions. Starts at 3.33 GHz and includes 8 MB of L3 cache. Uses the Twin Castle chipset. Part of the Truland platform
2005-05-26 Intel 945 Chipset succeeding Grantsdale supporting Dual Core processors to be named 945. Will be available both with and without GPU (945G and 945P versions). The GPU included is a faster clocked GMA900 called GMA950.
Earlier rumoured to include Pixel and Vertex shaders 2.0 or possible 3.0. Released in 945G, 945P etc. versions. Previously known as Lakeport.
A mainstream version called 945GZ with grpahics, but only one memorychannel, no 1066 MHz support and no PCIe will be added in 2006-Q1.
2005-Q2 Intel Tejas Successor to Prescott likely to be called Pentium V built on a 90 nm process, supporting IA-32e, DDR-II and PCI Express. Runs cooler and quiter than current chips. Uses a new LGA775 socket, with a 1066 MHz bus and starts at around 4.5 GHz, moving to around 9 before it is canceled. To include the 8 new "Tejas New Instructions" aka Azalia (Azalea), for improved audio multistreaming, speech recognition, Dolby Digital etc. Also includes "Extended Enhanced HyperThreading"...
Uses dual channel DDR-II DRAM at 533 MHz and the Alderwood and Grantsdale chipsets.
Will later be built in a 65 nm process, with a size of 80-100 mm2. The 65 nm version will get 2 MB of L2 cache on chip.
Earlier listed for a 04-Q4 launch, but recent news claim Prescott delays have moved the launch into 2005.
Tejas is canned in favor of Merom / Conroe.
2006-07-18 Intel Montecito Dual core IA-64 processor with Switch on Event MultiThreading (SoEMT), (like Niagara) built on a 90 nm process. Expected to improve on Madison 9M's performance by 2.5 times. To include 2 * 1MB of L2 cache, 2 * 12MB of L3 cache and around 1.7 billion transistors.
Consumes "only" 100W. (Foxton was to clock it up to 2.0 GHz when it was running cool enough, but was canceled.)
The 2.0 GHz / 24 MB versions are delayed until Q2 2006.
Will be named 9000 (9015, 9020, 9030, 9040 and 9050). The 9010 is a single core version.