2004-04-14 Nvidia GeForce 6800 New high-end graphics processor, succeeding NV35 (GeForce 5900). Includes Pixel Shader 3.0 and Vertex Shader 3.0 to support DirectX 9.0c (previously known as 9.1) and to include 16 "real" pipelines instead of the 4x2 architecture used previously.
Named GeForce 6800 and was to be shown at CeBIT or GDC with availability in April or May, but unveiled on April 14th.
Draws a massive 110W from two power cables. Previously known as NV40.
- 6800LE: 8 pipes, 4 shaders
- 6800: 12 pipes, 5 shaders
- 6800GT: 16 pipes, 6 shaders
- 6800 Ultra: 16 pipes, 6 shaders
2004-05-04 ATI Radeon X800 New high end graphics chip succeeding the R350/R360 based on a completely new design also known as project Loki. Was to be shown at Comdex in November-03, but was only shown to NDA-signing people on CeBIT-04 and launched to the rest of us in May. Was earlier said to support unified DX 9.0c and Pixel and Vertex Shaders 3.0, but only DirectX 9.0b is supported.
The R420 is a simplified version of the R400 (now R500) to get a new high-end chip out quicker. R420 still uses 24 bit precision (96 bit in total) but adds 3Dc compression.
Native PCI-Express support shows up in the R423 (X800 PCI-E), formely known as X880 on June 1st.
Two versions are launched: The X800 Pro includes 12 pipelines with availability now, while the X800 XT uses 16 and ships on May 21st. A low cost X800 SE with only 8 pipelines is also planned. Previously known as R420.
2004-06-21 PCI Express PC interconnect formerly known as 3GIO. Evolved from PCI and the physical interface of InfiniBand to a serial high bandwidth interface which will be used both as a PCI / AGP replacement and for chip to chip communications. Runs at 2.5 GHz and 0.8 V today, but will move to 5 GHz in PCI Express 2 in 2007-2008, and later to 10 GHz. Provides independent channels for each direction. Multiple bus widths are available:
- 1bit, x1: 250 MB/s (312 MB/s raw), 8 pins. PCI replacement
- 4bit, x4: 1 GB/s, 20 pins
- 8bit, x8: 2 GB/s, 40 pins
- 12bit, x12: ? pins
- 16bit, x16: 4 GB/s, 80 pins. Replacement for AGP and connects to the North Bridge
- 32bit, x32: ? pins
"PCI Express currently runs at 2.5Gtps, or 250MBps per lane in each direction, providing a total bandwidth of 16GBps in a 32-lane configuration. Future frequency increases will scale up total bandwidth to the limits of copper and significantly beyond that via other media without impacting any layers above the Physical Layer in the protocol stack."
Will also spawn a successor to the PCMCIA (PC-Card, CardBus) slot, 3GIO-M, Newcard or ExpressCard, which includes both PCI Express and USB 2.0 interfaces.