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2004-08-23 CPU Cheatsheet - Seven Years of Covert CPU Operations: Intel Cheat Sheet

Link to story (AnandTech)

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1998-01-26 Intel Pentium II 333 Klamath core shrunk to a 250 nm process.

1999-01-11 Intel Pentium III First Katmai chips launch at 450 and 500 MHz

1999-10-25 Intel Pentium III 500E Coppermine released at 500 MHz with a 100 MHz bus.

2000-11-20 Intel Pentium 4 P6, formerly known as Willamette, enhanced for speed in a number of ways, for example added decoders, execution units, larger buffers, a longer pipeline, an "instruction trace cache", and 256KB of on die L2 cache. The core runs at twice the clock speed and uses two ALUs. Uses a 400 MHz front side bus. Starts at 0.18 um shrinking to 0.13 later while clock speed moves from 1.5 GHz and up. Pricing 1.4 GHz: $625, 1.5 GHz: $795. Speeds up to 1.7 GHz in Q1 2001, and at or above 2 GHz in Q3.

2001-03-19 Intel Mobile 1GHz Mobile PIII based on the Tualatin 0.13 micron core speeds past 1 GHz. Power consumption will be somewhere below 2 W.

2001-05-21 Intel Pentium 4 Xeon Server chip based on Willamette, formerly known as Foster, and a bus bandwidth of 3.2GB/s. Cache bandwidths: L2: 8GB/s, L1: 32 GB/s. Core frequency 1.5GHz and beyond. 256 KB L2 cache. Ships at 1.4, 1.5 and 1.7 GHz priced at $268, $309 and $406 respectively.

2001-07-18 Intel Pentium III 1.20 Pentium III shrunk to 0.13um process starting at 1.26 GHz

2002-01-07 Intel Pentium 4 2.2 Willamette core shrunk to 0.13 um starting at 2.2 GHz introduced at $562. Uses the 478 pin socket and the Tehama or Brookdale North Bridge. Includes 512 kB cache.

2002-02-25 Intel Xeon 2.2 GHz 0.13 um shrink of the Foster Xeon processor formerly known as Prestonia. Includes HyperThreading technology.

2004-02-02 Intel Pentium 4E Also known as Prescott launches at 2.8 ($178), 3.0 ($218), 3.2 ($278) and 3.4 ($417) GHz with a 800 MHz front side bus and is built using a seven layer, Low-K, 90 nm Strained Silicon process.
Builds on the Netburst architecture, but adds "PNI" or Prescott New Instructions, which includes 11 new instructions, and LaGrande, a new security interface to go with Microsoft's Palladium. Also includes an improved pre-fetch branch predictor, improved HyperThreading, doubled L1 data cache size, doubled RAT History table size and advanced power manangement.
Will use Canterwood to start with, but in Q2 it will add the 64-bit CT Technology, move to Grantsdale and use the LGA775 socket.
Celeron Prescotts will be launched in Q2. Prescott reach 4 GHz in 2004-Q4 (now moved to 2005-Q1).
Now renamed Pentium 4E.

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