2004-06-21 Intel Prescott LGA775 Prescott using the LGA775 socket is launched. 64-bits (EM64T, CT Technology) for the desktop is slated for 05-Q2. EM64T chips will be called 'F' after the clock speed.
2005-02-21 Prescott 600 series / XE Pentium 4 XE is a Prescott update with 2 MB of L2 cache and a 1066 MHz bus released at 3.73 GHz. Needs the i925XE chipset or later to use the 1066 MHz bus. Previously called Pentium 4 720.
The first processors with the Execute Disable bit will have a 'J'-suffix.
The 6xx series and EE includes added Enhanced Speed Step (EIST or ESS) and EM64T support.
2005-03-29 Intel Potomac Prescott based chip for 4- and 8-processor servers. Will have the EM64T bit extensions. Starts at 3.33 GHz and includes 8 MB of L3 cache. Uses the Twin Castle chipset. Part of the Truland platform
2006-Q1 Intel Cedar Mill 65 nm processor Prescott-shrink, fill the gap between Prescott and Conroe. Said to be prepared for dual cores but will start off as a HyperThreading (dual threads) supporting single core chip. Newer info says that it is half a Presler. A value version with 512 KB of L2 cache, no HyperThreading and a slower bus is also rumoured.
2006-Q2 Intel Dempsey Dual core server processor to succeed Irwindale. An MV Dempsey with a power demand of less than 105 W will also be out. Part of the Bensley platform. Some samples will be out this year. Uses the Greencreek and Blackford chipsets
2006-07-27 Intel Conroe Major redesign of the desktop chips based on the mobile chip Merom. Should use the same bus as Merom and Tukwila. Part of the Averill platform. Said to be used in future Macs. Will be named E6300 (1.86 GHz, 2MB, $210), E6400 (2.13 GHz, 2MB, $230), E6600 (2.40 GHz, 4MB, $315) and E6700 (2.67 GHz, 1066 MHz, 4MB, $529). A value-segment version known as Conroe-L will be introduced in 2007-Q2. Will also be used in Uniprocessor Xeon chips (3040, 3050, 3060, 3070)
2006-07-27 Intel Merom Mobile processor succeeding Prescott-M and Yonah built on a 65 nm process. Accompanied by the Crestine chipset. Recent rumours claim that Merom is a major new core design with multiple cores and, depending on version, 2-4 MB of cache, which will also form the base for the next desktop chip, Conroe. Said to consume about 45W.
Earlier said to launch in 05-H2 or 2007, prototype chips has been out since May of 2006.
Merom is part of the Santa Rosa Centrino platform, succeeding Napa. Said to be used in future Macs.
Bus speed to go up to 800 MHz in 2007-H1.
Will be named T7600, the T7400, the T7200 and T5600.
2008 AMD K10 Next generation AMD platform with a pin count > 940 pins... Earlier plahnned for 2006...
2008 Intel Tanglewood / Tukwila IA-64 processor originally said to have eight (plus one spare) cores per die and 16-32MB of cache to follow after Montecito. Appears to use parts from a follow-on project to the now canceled Alpha EV8. Said to arrive in 2006 or 2007 and offer "at least seven times the processing" power of Madison. Other rumours claim that HP wants their advanced math libraries on the die in silicon and that it might include a vector engine.
The 8+1 core version (designed in Hudson) is now said to be replaced by a 2-core version designed in Fort Collins.
Recently said to be renamed from Tanglewood to Tukwila due to copyright reasons.
Should use the new CSI bus and socket like Whitefield). Latest info indicates it will include 4 cores with 6x4 MB of L2 cache and an on-bord FB-DIMM memory controller..