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Roadmap: (All) Processors Chipsets Graphics Technologies Software Memory Technologies Communications Chipsets (South Bridges) Sort by: Time Time Dec Item Item Dec Update Update Dec Show old
Showing 1-15 from 15 results. Page: [1 ]
2008-H2 AMD Cadiz 4-core, shared L2 cache, DDR2/3, HyperTransport3
2008-H2 AMD Zamora 4-core, shared L3-cache, FB-DIMM, HyperTransport3
2008 Intel Harpertown Server processor to succeed Clovertown.
2008 Fujitsu SPARC64 VI+ Four core chip.
2008 Intel Hapertown Octa-core chip with 12 MB of shared L2 cache, built in the 45 nm process.
2008 Intel Bloomfield Quad-core chip on one die built in the 45 nm process. Released on or after 2008.
2008 Intel Yorkfield Chip with 8 cores on more than one die for the desktop. 12 MB shared L2 cache.
2008 Intel Ridgefield Dual core chip on one die for the desktop. Includes 6MB of L2 cache.
2008 Intel Wolfdale Dual cores on a single die with 3 MB of shared L2 cache.
2008 Intel Dunnington Eight-core server processor for IA32. Succeeds Whitefield. Possibly merged with Tigerton as it is sometimes referred to as Tigerton Dunnington.
2008 AMD K10 Next generation AMD platform with a pin count > 940 pins... Earlier plahnned for 2006...
2008 Intel Tanglewood / Tukwila IA-64 processor originally said to have eight (plus one spare) cores per die and 16-32MB of cache to follow after Montecito. Appears to use parts from a follow-on project to the now canceled Alpha EV8. Said to arrive in 2006 or 2007 and offer "at least seven times the processing" power of Madison. Other rumours claim that HP wants their advanced math libraries on the die in silicon and that it might include a vector engine. The 8+1 core version (designed in Hudson) is now said to be replaced by a 2-core version designed in Fort Collins. Recently said to be renamed from Tanglewood to Tukwila due to copyright reasons. Should use the new CSI bus and socket like Whitefield). Latest info indicates it will include 4 cores with 6x4 MB of L2 cache and an on-bord FB-DIMM memory controller..
2008 Intel Nehalem Nehalem was a new design built using a 65 nm process with half the die size of a Northwood. Was supposed to use a 1200 MHz (or a 4 GHz bus as some rumours claim) bus and start at 9.60 GHz before continuing to 10 GHz+. Nehalem is now changed to be the name of the family succeeding Merom, Conroe and Woodcrest, which is 45nm and will include Whitefield, Gainstown and Bloomfield. The Nehalem platform will use the Tylersburg chipset
2010 Intel Keifer 32-core server processor said to be 15 times faster than Woodcrest...
2010 Intel Gesher Said to be a mobile chipset in the Nehalem timeframe. Later known as a 32nm processor platform to succeed Nehalem.